| 摘要 |
A pull-in circuit of the present invention which can shorten the time of the pull-in operation. The pull-in circuit comprises: a pseudo-random pattern operating circuit for operating an operated pseudo-random pattern on the basis of consecutive bits of the parallel receiving data; a comparison circuit for comparing the operated pseudo-random pattern with a receiving pattern of the receiving data corresponding to the operated pseudo-random pattern; a one-shot circuit for passing a first pulse outputted from the comparison circuit when the operated pseudo-random pattern is coincident with the receiving pattern; a parallel pseudo-random pattern generation circuit for generating the reference parallel pseudo-random pattern when the first pulse passes through the one-shot circuit; a delay circuit for delaying the receiving data; and a bit error detection circuit for detecting a bit error, which compares the receiving data outputted from the delay circuit with the reference parallel pseudo-random pattern.
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