Modulating basic clock for digital circuits involves varying distances between successive switching edges according to given relationship number of equidistant sections per half period

摘要

The method involves varying the distances between adjacent switching edges, whereby the basic clock (CL) is divided into equidistant sections and the distances of the adjacent edges are varied depending on cyclically repeating random numbers. The position of an edge following a preceding edge is given by a relationship a(i+1) = (a(i) + p -((N-1)/2 - Z(i+1))) mod p, where p is the number of equidistant sections per half period; N is the number of possible switching edges and is odd; and AZ represents the random number. An Independent claim is also included for a modulator for modulating a basic clock for digital circuits.