| 摘要 |
PROBLEM TO BE SOLVED: To eliminate operation for unnecessary simulation, etc., by accurately measuring a description which is not covered by a verification test and preventing an unnecessary test from being generated when the coverage of test data used to test the function of a logic circuit is evaluated. SOLUTION: A coverage devaluation system 10 is composed roughly of an input means for inputting a register transfer level(RTL) description 3, a means for inputting a verification suite 4, a function test coverage measuring instrument 1 which measures the function test coverage, an RTL simplifying device 2 which simplifies RTL, and an output means which outputs a converted verification suite 5. The outputted verification suite 5 is generated by deleting unnecessary test vectors regarding unnecessary parts of the RTL description 3 from test vectors included in the inputted verification suite 4.
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