Read operation scheme for a high-density, low voltage, and superior reliability nand flash memory device

摘要

The source end of a NAND string in a scalable, lower voltage flash memory device is biased during a memory read operation to prevent problems associated with punchthrough. Due to the biasing, the channel length of the floating gate transistors in the flash memory device can be shortened, and the pass voltage employed during the memory read operation can be lowered.