| 摘要 |
PURPOSE: A method for fabricating a semiconductor integrated circuit device is provided to improve characteristics of the device and to increase a process margin for contact holes by reducing junction leakage current at an active region. CONSTITUTION: A P-MOS transistor having a surface channel is provided. The P-MOS transistor includes an n-type active region(122) and a p-type active region(124) formed in a semiconductor substrate(110). Furthermore, after the first insulating layer(126) is deposited over the substrate(110) and contact holes(128) are then formed in the first insulating layer(126), plug electrodes(130) of polysilicon are formed in the contact holes(128) above the p-type active region(124) besides the n-type active region(122). Additionally, another contact holes(132) are formed in the second insulating layer(132) to expose the plug electrodes(130) and gate electrodes(116).
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