| 摘要 |
PURPOSE: An apparatus for efficiently testing an inner ROM is provided to assign an expected value one by one every data stored in an inner ROM, compare an MISR calculation value corresponded to data to the assigned expected value every time to judge whether an error is or not, and thereby searching exactly an error position when an error is generated. CONSTITUTION: An apparatus for testing an inner ROM includes an address generating portion, a first selecting portion, an MISR(Multiple Input Signature Register) circuit portion(104), and a comparing device(106). The address generating portion sequentially generates from the 0th address to the last address of an inner ROM(100). The first selecting portion selectively outputs an address of the inner ROM which is sequentially outputted from the address generating portion. The MISR circuit portion is sequentially inputted the inner ROM data corresponding to the address of the inner ROM outputted from the first selecting portion, performs a specific calculation, and outputs a calculation value. The comparing device is controlled by a test ending signal becoming 'enable' when the test operation to the inner ROM is ended, compares the inner ROM data to each MISR calculation value and an expected value being sequentially inputted so as to be corresponded to each of the inner ROM data from the outside, and outputs an error flag signal.
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