发明名称 METHOD FOR MAKING WAFER LEVEL PACKAGE
摘要 PURPOSE: A method for making a wafer level package is provided to achieve a rapid electric signal transmission by maximally prolonging a thickness of a metal pattern within an allowable range and lowering a resistance of a metal pattern. CONSTITUTION: A lower insulating layer(60) is deposited on a surface of wafer(40) having many semiconductor chips including many bonding pads(41) therein. A metal thin film is thermal-pressed on the lower insulating layer, and then the metal thin film is patterned. The exposed lower insulating layer positioned on the bonding pad is removed in the metal pattern, a via hole is formed, and the bonding pad is exposed through the via hole. A metal layer(70) inside of the via hole is electroplated by an electrical method, the bonding pad is electrically connected to one end of the metal pattern through the metal layer. An upper insulating layer(80) is deposited on the total structure, the upper insulating layer is etched, the other end of the metal pattern is exposed, thereby forming a ball land. A solder ball(100) is mounted to the ball land. A cutting process is performed along a scribe line formed on the wafer, and thus the wafer is divided into many semiconductor chips.
申请公布号 KR20010004890(A) 申请公布日期 2001.01.15
申请号 KR19990025653 申请日期 1999.06.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHO, SUN JIN
分类号 H01L23/13;(IPC1-7):H01L23/13 主分类号 H01L23/13
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