发明名称 Non-volatile semiconductor memory device with an improved verify voltage generator
摘要 The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite operation, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.
申请公布号 US6172911(B1) 申请公布日期 2001.01.09
申请号 US19990283583 申请日期 1999.04.01
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TANAKA TOMOHARU;MOMODOMI MASAKI;KATO HIDEO;NAKAI HIROTO;TANAKA YOSHIYUKI;SHIROTA RIICHIRO;ARITOME SEIICHI;ITOH YASUO;IWATA YOSHIHISA;NAKAMURA HIROSHI;ODAIRA HIDEKO;OKAMOTO YUTAKA;ASANO MASAMICHI;TOKUSHIGE KAORU
分类号 G06F11/10;G11C16/10;G11C16/12;G11C16/24;G11C16/34;G11C29/00;G11C29/34;G11C29/52;(IPC1-7):G11C16/06 主分类号 G06F11/10
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