| 摘要 |
A semiconductor memory device which prevents a sub word line from being incorrectly selected when a main word line breaks. A plurality of memory cells are connected to a main word decoder each via the main word line, a sub word decoder, and a sub word line. A plurality of redundant memory cells are connected to a redundant fuse circuit each via a redundant main word line, a redundant sub word decoder, and a redundant sub word line. A connection between the main word line and the sub word decoder and a connection between the redundant main word line and the redundant sub word decoder are each grounded by a high-resistance resistor.
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