| 摘要 |
PROBLEM TO BE SOLVED: To provide a level converting device for preventing the rising of an output signal after conversion from becoming dull even when operating level conversion is performed or not. SOLUTION: A signal obtained by logically inverting an input signal S101 of which H level potential is VDDL is connected with the gate of an N type MOS transistor 121, and the input signal S101 is shifted by a level shift part 106, and connected with the gate of a P type MOS transistor 111, and the source of the P type MOS transistor is connected with VDDH. A control signal S105 is inputted to the gate of a P type breakdown voltage protecting MOS transistor 112, and the VDDL is inputted to the gate of an N type breakdown voltage protecting MOS transistor 122. When outputting the H level of an output signal S103 in the VDDH, the control signal S105 to be applied to the gate of the P type breakdown voltage protecting MOS transistor is obtained as a signal generated by a gate voltage generating part 104, and when outputting the H level of the output signal S103 in the VDDL, this signal is obtained as a signal in a ground level.
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