发明名称 Streaming memory controller for a PCI bus
摘要 In a system having a PCI bus, an additional memory attached to the bus to allow a higher speed of data transfer for a number of copies from the computer to a number of devices. The additional memory has a number of DMA channels, each associated with an I/O device. One copy of the data required by an I/O device is transferred to the memory at normal computer FIFO speed. Thereafter, multiple copies of that data can be transferred to the I/O device from the memory at the higher data bus speed.
申请公布号 US6163818(A) 申请公布日期 2000.12.19
申请号 US19980141398 申请日期 1998.08.27
申请人 XEROX CORPORATION 发明人 NGUYEN, UOC H.;SPERBER, OTTO;TRAN, KHANH Q.;BOVAIRD, DAVID K.
分类号 G06F3/12;B41J21/00;G06F13/28;G06F13/36;(IPC1-7):G06F13/00 主分类号 G06F3/12
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