| 摘要 |
PROBLEM TO BE SOLVED: To shorten the circuit path while reducing resistor-capacitor delay by coating through vias made in a substrate with a conductive layer, forming a solder mask on the conductive layer, coating a part of the conductive layer and exposing the bonding pad region. SOLUTION: Through vias are made at desired positions of ball grid pads on a substrate to form a substrate 200a, an adhesive layer 206a is formed thereon and attached with a conductive layer 208a. A solder mask 212 is then formed on the conductive layer 208a to cover a part of the substrate 200a and the conductive layer 208a and to expose only the region for forming a bonding pad region on the conductive layer 208a. An electroplating layer is formed on the bonding pad region in order to form electroplating bond pads 216a and an electroplating layer is formed on the ball grid pad region in order to form electroplating bond pads 216b. According to the structure, internal circuit path of the package board is shortened and resistor-capacitor delay is reduced significantly. |
