发明名称 CHIP SCALE PACKAGE
摘要 PURPOSE: A chip scale package is provided to improve adhesion reliability by broadening a contact area between a ball pad and a barrier metal layer on which a solder ball is formed. CONSTITUTION: A chip scale package(90) comprises a plurality of chip pads(12), an integrated circuit chip, a lower insulating layer, a metal interconnection layer(17), an upper insulating layer, a barrier metal layer(66) and a solder ball(70). The plurality of chip pads are formed on an upper surface. The integrated circuit chip has a passivation layer(14) for protecting the chip pads. The lower insulating layer is formed on the passivation layer to expose only the chip pads. The metal interconnection layer has a ball pad(62) to which the solder ball is connected, provided on the lower insulating layer while connected to each chip pad for realigning the chip pads. The upper insulating layer has a connection hole to expose the ball pad, provided on the metal interconnection layer and lower insulating layer to protect the metal interconnection layer. The barrier metal layer is formed on the ball pad and connection hole and near the connection hole. The solder ball is formed on the barrier metal layer existing on the ball pad. In particular, the chip scale package comprises an iron part composed of the upper insulating layer in a central portion of the connection hole to improve adhesion of the solder ball on the ball pad by broadening a contact area between the solder ball and the ball pad.
申请公布号 KR20000065487(A) 申请公布日期 2000.11.15
申请号 KR19990011824 申请日期 1999.04.06
申请人 SAMSUNG ELECTRONICS CO, LTD. 发明人 SIM, SEONG MIN;LEE, TAE U
分类号 H01L21/60 主分类号 H01L21/60
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