发明名称 MEASURING METHOD FOR CLOCK JITTER
摘要 PROBLEM TO BE SOLVED: To quantitatively grasp an amplitude of a measured clock jitter to enhance evaluation precision of a measured device. SOLUTION: Comparators 14-1 to 14-6 compare measured clocks from a measured device 2 with an expected value in each rise of timing signals T1 to T6, and binary data in response to compared results thereof are stored in a storage element of a register 15 in order. The binary data stored in the register 15 expresses a time axis-directional swinging amount of an edge of the measured clock, i.e., an amplitude amount of the jitter of the measured clock. When the binary data stored in a memory 17 reach to a prescribed amount, a jitter amplitude calculating part 18 conducts FFT processing for the binary data to calculate a jitter amplitude in a specified jitter frequency.
申请公布号 JP2000314767(A) 申请公布日期 2000.11.14
申请号 JP19990124983 申请日期 1999.04.30
申请人 ASAHI KASEI MICROSYSTEMS KK 发明人 NAGASHIMA YUICHI
分类号 G01R29/02;G01R19/00;G01R31/28;G01R31/319;(IPC1-7):G01R31/319 主分类号 G01R29/02
代理机构 代理人
主权项
地址