发明名称 UNIVERSAL PACKAGE AND METHOD OF FORMING THE SAME
摘要 <p>A chip module (10) comprising a chip array (14) which includes an interconnect substrate (16) having opposed, generally planar surfaces and a first interconnect pad array (22) disposed on at least one of the surfaces. Attached to the interconnect substrate (16) is at least one integrated circuit chip (34) which is electrically connected to the first interconnect pad array (22). Chip module (10) further comprises a package (12) which comprises a main body (42) defining a cavity sized and configured to receive chip array (14) and having a generally planar interconnect shelf which extends within the cavity and includes a second interconnect pad array disposed thereon. The package (12) also includes a lid (44) attachable to main body (42). The chip array (14) is insertable into the cavity such that the first and second interconnect pad arrays are in aligned contact with each other and the attachment of lid (44) to main body (42) encloses and seals the chip array (14) within package (12).</p>
申请公布号 WO0065652(A1) 申请公布日期 2000.11.02
申请号 WO2000US04988 申请日期 2000.02.25
申请人 DENSE-PAC MICROSYSTEMS, INC. 发明人 ROSS, ANDREW, C.
分类号 H01L23/538;H01L25/10;H05K1/02;H05K1/14;H05K1/18;H05K3/34;(IPC1-7):H01L23/02;H01L23/15;H01L23/043;H01L23/10 主分类号 H01L23/538
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