发明名称 SIGNAL GENERATION CIRCUIT FOR SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To generate many test-mode selection signals without increasing the number of pins by scrambling a first signal and a second signal which are output respectively from a prescribed number of buffers connected respectively to an n-th pin from a second pin, and high-voltage detection signals which are output respectively from the prescribed number of high-voltage detection means connected respectively to the n-th pin from the second pin, respectively. SOLUTION: A buffer 32 and buffers 36-1 to 36-n buffer respective input signals Ai (where i=1 to n), and two kinds of signals PAiB, PAi (where i=1 to n) whose levels are mutually complementary are generated. High-voltage detectors 38-1 to 38-n generate signals SAi [where i=1 to (n-1)] when the respective input signals are high voltages. Scrambling circuits 40-1 to 40-n scramble the input signals PAiB, PAi (where i=1 to n) and the signals SAi [where i=1 to (n-1)], and signals PAiB, PPAi, SAj [where i=2 to n and j=1 to (n-1)] are generated.
申请公布号 JP2000306398(A) 申请公布日期 2000.11.02
申请号 JP19990240337 申请日期 1999.08.26
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 BOKU TETSUKO;KANG SANG-BOM;CHOI JONG-HYEON
分类号 G11C11/413;G01R31/28;G01R31/3181;G01R31/3185;G11C11/401;G11C11/407;G11C29/14;G11C29/46;(IPC1-7):G11C29/00;G01R31/318 主分类号 G11C11/413
代理机构 代理人
主权项
地址