| 摘要 |
A clock signal producing device produces a clock signal, which is in synchronism with an inputted reference signal and has a frequency other than a frequency of an integer multiple of the reference signal or other than a frequency of the reference signal divided by an integer. The clock signal producing device is provided with the low pass filter (LFP) 4 and the frequency dividing section 10 comprising the phase calculation section 1, the sinusoidal calculation section 2, and the D/A (digital to analog) converting section 3. An output signal of the LPF 4 is supplied to the phase comparator 5. The phase calculation section 1 calculates a phase theta (nT) of the reference signal SREF separately in a integer part and in a decimal part at a time of generation t=nT, where "n" is an integer and T is a period of the clock signal SCL, and outputs a value of the integer part as a digital phase value. The sinusoidal calculation section 2 converts the digital phase value into an amplitude value of a sinusoidal wave signal. The amplitude value is converted from digital to analog and supplied to the phase comparator 5.
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