发明名称 Split via surface mount connector and related techniques
摘要 An interconnection circuit includes a plated through hole having a plurality of electrically isolated segments with at least one of the plurality of electrically isolated segments coupled to a signal path and at least one of the electrically isolated segments coupled to ground. With this arrangement, the circuit provides a signal path between a first and a second different layers of a multilayer. By providing one segment as a signal segment and another segment as a ground segment the size and shape of the electrically isolated segments can be selected to provide the interconnection circuit having a predetermined impedance characteristic. The interconnection circuit can thus be impedance matched to circuit board circuits, devices and transmission lines, such as striplines, microstrips and co-planar waveguides. This results in an interconnection circuit which maintains the integrity of relatively high-frequency signals propagating through the interconnection circuit from the first layer to the second layer. The interconnect circuits can be formed by creating distinct conductor paths within the cylindrical plated through-holes using variety of manufacturing techniques including, but not limited to, broaching techniques, electrical discharge milling (EDM) techniques and laser etching techniques.
申请公布号 US6137064(A) 申请公布日期 2000.10.24
申请号 US19990359849 申请日期 1999.07.23
申请人 TERADYNE, INC. 发明人 KIANI, SEPEHR;VALLANCE, R. RYAN
分类号 H01R12/51;H05K1/02;H05K1/11;H05K3/04;H05K3/30;H05K3/34;H05K3/40;H05K3/42;(IPC1-7):H01R12/04 主分类号 H01R12/51
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