| 摘要 |
PROBLEM TO BE SOLVED: To attain on-chip configuration, to reduce the power consumption and to decrease the cost of the titled processing unit by realizing interleave/de- interleave processing with a minimum arithmetic quantity so as to make the circuit scale small. SOLUTION: In this processing unit, a RAM 107 stores received data in a storage area of consecutive addresses, and the stored data are read consecutively from addresses of the RAM 107 in response to an address pointed out by a 1st pointer 101 and an address from an address generator 106 in a way of double precision. One portion of the data among the data stored in the RAM 107 are stored in a storage area of even number addresses of a RAM 122 on the basis of an address pointed out by a 2nd pointer 110 and an address from an address generator 119, and the other portion data are stored in a storage area of odd number addresses having a prescribed offset from the even number of addresses of the RAM 122 on the basis of an address pointed out by a 3rd pointer 120 and an address from an address generator 121. The interleave/de- interleave processing above is executed for every one machine cycle. |
