发明名称 TESTING APPARATUS AND TEST METHOD FOR SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device-testing apparatus which shortens a test time by resuming a stopped test from a predetermined control sequence when simultaneously testing a plurality of semiconductor devices. SOLUTION: A pattern generator 10 of a semiconductor device-testing apparatus 100 includes a match fail-detecting part 20, a fail mode selector 30, a fail mode register 32, a sequence control part 40 and a pattern data memory 50. The sequence control part 40 outputs an address signal 45 to the pattern data memory 50 to generate an input signal pattern 12 and an expectation signal pattern 14. The match fail-detecting part 20 detects a match fail where a match signal 96 is not active during a predetermined cycle. The fail mode selector 30 selects a process at the match fail time on the basis of a setting of the fail-mode register 32.
申请公布号 JP2000292495(A) 申请公布日期 2000.10.20
申请号 JP19990095744 申请日期 1999.04.02
申请人 ADVANTEST CORP 发明人 NAKAYAMA HIROYASU
分类号 G01R31/28;G01R31/26;G01R31/3183;G11C29/56;(IPC1-7):G01R31/28;G01R31/318 主分类号 G01R31/28
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