发明名称 |
Playback clock extracting apparatus |
摘要 |
A playback clock extracting device having: a quantization member for quantizing, at a sampling clock rate having a rate twice a recording rate, a signal played back from a recording medium so as to output sample data, a digital equalizer for subjecting the sample data to digital equalization so as to alternately output playback data and PLL data at an interval of one sampling clock, cycle a ternary decision member for making a ternary decision as to whether the playback data is positive, zero or negative. The playback clock extracting device further having arithmetic unit for calculating a sampling phase error in the quantization member by multiplying a result of the decision of the ternary decision member by a difference between two successive data values of the PLL data outputted immediately prior to and immediately after the playback data for the decision of the ternary decision member, respectively, a sampling clock generating member which controls a phase and an oscillation frequency on the basis of the sampling phase error outputted by the arithmetic unit so as to generate the sampling clock, and a playback clock generating member which divides a frequency of the sampling clock by two so as to generate a playback clock for detecting the playback data.
|
申请公布号 |
US6134064(A) |
申请公布日期 |
2000.10.17 |
申请号 |
US19980080385 |
申请日期 |
1998.05.18 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
SATO, MASAFUMI;HASHIMOTO, KIYOKAZU;IZAWA, MASATO |
分类号 |
G11B5/008;G11B5/09;G11B20/10;G11B20/14;H03L7/091;(IPC1-7):G11B5/09 |
主分类号 |
G11B5/008 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|