CHIP SCALE PACKAGE AND METHOD FOR MANUFACTURING THE SAME

摘要

PURPOSE: A chip scale package and a method for manufacturing the chip scale package are provided to achieve the high integration and minification of the article by loading various kinds of chips in one package. CONSTITUTION: A chip scale package includes a first semiconductor chip(100) having a first bonding pad(105) at a surface thereof and a second semiconductor chip(150) having a second bonding pad(155) at a surface thereof. The second semiconductor chip(150) exposes the first bonding pad(105) and is placed on the first semiconductor chip(100). A damping film(500) is attached to the second semiconductor chip(150). An insulation film(800) is adhered to the damping film(500). A land pattern(300) is formed on the insulation film(800) in such a manner that the surface of the land pattern(300) is exposed. A first lead(450) and a second lead(410) are respectively connected to the first and the second bonding pads(105,155). A sealing section(700) seals the exposed surfaces of the first and the second semiconductor chips(100,150).