发明名称 METHOD FOR DETECTING LOCK OF SYMBOL SYNCHRONOUS CIRCUIT IN DIGITAL RECEIVER
摘要 PURPOSE: A lock detecting method of a symbol synchronous circuit is provided to be capable of reducing an affect due to a noise by using an absolute value of a lock state detection signal of a symbol synchronous circuit. CONSTITUTION: A lock detecting method of a symbol synchronous circuit comprises obtaining an absolute value of a BPSK signal of detecting a lock state of the symbol synchronous circuit(90). The absolute value is accumulated by a predetermined frequency, and then the accumulated value is compared with a predetermined threshold value. Whether the symbol synchronous circuit is locked is judged according to the comparison value. The symbol synchronous circuit(90) consists of a voltage-controlled oscillator(50), a loop filter(70) and a timing error detector(80). The loop filter(70) drives the voltage-controlled oscillator(50) according to an output value of the timing error detector(80) so as to adjust a clock used in each analog-to-digital converter(40a,40b).
申请公布号 KR20000060526(A) 申请公布日期 2000.10.16
申请号 KR19990008866 申请日期 1999.03.16
申请人 LG INFORMATION & COMMUNICATIONS LTD. 发明人 JUNG, SEUNG CHEOL
分类号 H03L7/00;(IPC1-7):H03L7/00 主分类号 H03L7/00
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