STATIC SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: A static semiconductor memory device is provided which can prevent the mis-operation of the semiconductor memory device by assuring the margin between a power voltage level and a ground voltage level of data latched to a memory cell due to a high resistance of a ground voltage line during low voltage operation. CONSTITUTION: A static semiconductor memory device comprises: a plurality of word lines arranged in a lateral direction; a plurality of bit lines arranged in an orthogonal direction with the plurality of word lines; a plurality of power voltage lines(VCC) arranged in the same direction as the bit lines; a plurality of first ground voltage lines(VSS) arranged in the same direction as the bit lines; a plurality of second ground voltage lines(VSS) arranged in the same direction as the word lines; and a plurality of CMOS memory cells each connected between the plurality of word lines and the plurality of bit lines. Thus, the static semiconductor memory device prevents the mis-operation of the memory device by assuring the margin between the power voltage level and the ground voltage level of data latched to the memory cell by reducing the resistance of the ground voltage line by arranging the ground voltage line gauzily.