| 摘要 |
A standard CPU (with a data cache) is modified in such a way as to permit the programmer to bypass the data cache when necessary in order to fetch or store data items directly from/to the memory, ensuring that data accesses exhibiting a high degree of locality are made to the cache, while those accesses that are non-local, or referencing shared data items, are made directly to the main memory, bypassing the cache. The fundamental observation is that in most situations the programmer of the CPU could very easily determine which data items could benefit from being placed into the data cache and which ones could not. This is especially true in embedded communications environments where the programmer has explicit control over data items that are shared between the program running on the CPU and the remainder of the hardware elements. The performance penalties incurred when the data cache is bypassed are obviated by means to allow the programmer to group accesses to these data items in such a way as to optimize references to main memory.
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