BURIED FLASH MEMORY AND DEVICE EQUIPPED WITH EEPROM MEMORY

摘要

PROBLEM TO BE SOLVED: To lessen additional processing steps in number by a method wherein an EEPROM memory is provided on an integrated circuit die, and a flash memory is formed substantially through the same processing steps with the EEPROM memory. SOLUTION: An EEPROM memory 104 is provided on an integrated circuit die, and a flash memory 102 is formed on the same integrated circuit die through the same processing technique with the EEPROM memory 104. The flash memory 102 and the EEPROM 104 are connected to a processor 106 and a system memory controller 108 through the intermediary of a local bus 112 and an interface 110 to control an off-chip random access memory. By this setup, additional processing steps can be lessened in number, and a device cost can be lessened as a whole.