发明名称 Vorrichtung und Verfahren für den eingebauten Selbsttest einer elektronischen Schaltung
摘要 The invention relates to a device and method for carrying out the built-in self-test of an electronic circuit which contains both a combinatorial logic unit (10) as well as a memory (12), whereby a common self-test circuit is provided for the logic unit (10) and memory (12) and the self-test is simultaneously carried out by the logic unit and memory.
申请公布号 DE19911939(A1) 申请公布日期 2000.10.05
申请号 DE19991011939 申请日期 1999.03.17
申请人 SIEMENS AG 发明人 KNIFFLER, OLIVER;DIRSCHERL, GERD
分类号 G01R31/28;G01R31/3183;G01R31/3185;G11C29/02;G11C29/36;G11C29/40;(IPC1-7):G01R31/318;G06F11/00 主分类号 G01R31/28
代理机构 代理人
主权项
地址