| 摘要 |
PROBLEM TO BE SOLVED: To provide a TTL input Schmitt input circuit having a wide hysteresis width that can decrease effect of the hysteresis width due to process fluctuation and allows even a VN side to provide hysteresis by preventing a through-current at rising of power. SOLUTION: This circuit is configured with a first-stage inverter (PMOS-TR (P3(3)), PMOS-TR (P4(4)), PMOS-TR (P5(5)), PMOS-TR (P6(9)), and NMOS-TR (N3(6)), an NMOS-TR (N4(8)) for providing hysteresis to a VP side, a PMOS-TR (P5(5)) to provide hysteresis to a VN side and an NMOS-TR (V5(12)). This circuit can reduce the effects of process fluctuation on the hysteresis width and to provide hysteresis to a VN side also.
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