| 摘要 |
PURPOSE: An insulated gate transistor is provided to improve the capacity for preventing a latch-up by reducing a resistance of a gate electrode. CONSTITUTION: An insulated gate transistor comprises: a first semiconductor region of a first conductivity having a main surface; a second semiconductor region(4) of a second conductivity; a third semiconductor region(5); a fourth semiconductor region(6) of a first conductivity; a first insulation layer; a control electrode(9,9a); a first main electrode electrically connected to the second and fourth semiconductor regions; and a second main electrode electrically connected to the third semiconductor region. The second semiconductor region of the second conductivity is prolonged to the first region on the main surface and has a shape of a stripe, aligned in a direction of a length, having a plurality of portions disposed in parallel. The fourth semiconductor region of the first conductivity is extended to the plurality of portions of the second semiconductor region on the main surface, disposed along a direction of a length of the second semiconductor region. The first insulation layer is formed on the main surface, covering the first, second and fourth semiconductor regions. The control electrode is composed of a polycrystalline semiconductor, covering the first, second and fourth semiconductor region via the first insulation layer. A metal wiring layer is established on the main surface via the insulation layer. A plurality of regions insulated from the first main electrode is established, penetrating the first main electrode. The metal wiring layer is electrically connected to the control electrode through the insulation layer via the region insulated from the main electrode. |
