| 摘要 |
PURPOSE: A memory cell equipped with cell access lines is provided to optimize a cell dimension and increase the design flexibility by reducing capacitive coupling between adjacent packed runners. CONSTITUTION: Reading word lines(11) and recording word lines(12) are extended in an x direction. A pair of recording bit lines and a pair of reading bit lines are extended in a y direction, wherein at least one bit line is adjacent to the reading bit lines. Shield runners(41) are extended between the recording bit lines(12) and the reading bit lines(11). Units are provided to connect the shield runners to a fixed potential. The shield runners(41) are about 50% extended with respect to a length of the reading bit lines. Word line shield runners are extended between the reading and recording word lines(11, 12).
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