| 摘要 |
PROBLEM TO BE SOLVED: To make it possible to relieving a defect of a sub-memory part by responding fast to an access request from plural memory masters by separately providing a normal use memory cell array and a redundancy use memory cell array with plural sub-data lines connected to memory cell groups of each row. SOLUTION: A redundancy use data I/O line SIOR and a normal use data I/O line SIO belonging to a same row are separately connected, via a data I/O line connecting circuit, to a redundancy use global data I/O line GIOR and a normal use global data I/O line GIO, respectively. Two redundancy use SRAM column selecting signals are activated when the SRAM addresses coincide with pre-programmed defective column addresses. And, a redundancy use read write amp 153R is activated and a normal use read write amp 153 is also activated. Since this device is provided with two lines of replaced address judging circuits, the device is able to relieve two defective column addresses.
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