发明名称 CODING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a coding circuit by which an indefinite coded signal is not outputted through error concealment, even when the coding of an input signal is not finished within a predetermined period. SOLUTION: A frame A and a frame B to the frame A are inputted in succession to the coding circuit 100 as an input signal S100, a data processing means 102 encodes the frames A, B in order, a data storage means 103 stores processed data S1022 resulting from coding the frame A, an address and a size of the frame A are outputted as a head address S1020 and an output size S1021 until the coding of the frame B is finished, after the coding of the frame A has been finished. A counter 101 generates a frame signal S101 denoting a delimiter of the input signal, a data control means 104 latches the head address S1020 and the output size S1021 at the fall of the frame signal S101 and outputs them as an output address S1040, which is given to the data stream 103.
申请公布号 JP2000252835(A) 申请公布日期 2000.09.14
申请号 JP19990052266 申请日期 1999.03.01
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HIRANO TAKEHISA;NAKAI KATSUHIRO;NANBA TAKESHI;MORI TAKESHI
分类号 G06F11/10;H03M7/30;(IPC1-7):H03M7/30 主分类号 G06F11/10
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