发明名称 METHOD AND DEVICE FOR CONTROLLING MULTIPROCESSOR
摘要 PROBLEM TO BE SOLVED: To unnecessitate a circuit for memory access arbitration and to easily predict the execution time of an application by eliminating necessity for memory access arbitration in a memory shared multiprocessor when a conflict occurs. SOLUTION: A multiprocessor system 100 is provided with N pieces of processors 1-3 (N is an integer >2) having N pieces of instruction fetch stages for fetching instructions 14-16 on one of N pieces of instruction fetch stages and outputting addresses through pipeline processing of the above instructions, an address selecting part 8 for outputting N pieces of band addresses 17-19 corresponding to N pieces of addresses 11-13 outputted by N pieces of processors 1-3 and M pieces of bands 5-7 (M is an integer >N) for storing a plurality of instructions and outputting one of the above instructions corresponding to one of N pieces of bank addresses 17-19 outputted by the address selecting part 8. In this case, N pieces of processors 1-3 fetch the instructions 14-16 on the mutually different above instruction fetch stages.
申请公布号 JP2000250869(A) 申请公布日期 2000.09.14
申请号 JP19990052016 申请日期 1999.02.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMAZAKI MASAYUKI;UEDA KATSUHIKO
分类号 G06F15/16;G06F9/38;G06F15/78;G06F15/80;(IPC1-7):G06F15/16 主分类号 G06F15/16
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