发明名称 DETECTION METHOD AND APPARATUS OF CHIP ARRANGEMENT, AND BONDING METHOD AND APPARATUS
摘要 <p>PROBLEM TO BE SOLVED: To provide a detection method of chip arrangement and a bonding method for improving productivity by controlling the arrangement of a regular chip in a wafer. SOLUTION: After dislocation in angle between an arranging direction of chips in a teaching wafer 1 and the X-direction of a wafer stage 2 is compensated for, the center coordinate of the teaching wafer 1 and the radius of the teaching wafer 1 are obtained. Then, the position of the orientation flat included in the wafer 1 is obtained, and the size and the position of a regular chip that is typically specified from regular chips are obtained. In addition, each space between the adjoining chips in the X-and Y-directions is obtained, and a regular chip arrangement map is calculated by an equipment control unit 4 on the basis of these data.</p>
申请公布号 JP2000236003(A) 申请公布日期 2000.08.29
申请号 JP19990036967 申请日期 1999.02.16
申请人 MITSUBISHI ELECTRIC CORP;MITSUBISHI ELECTRIC ENGINEERING CO LTD 发明人 TSUCHIYA YASUSHI;SHIKA KOJI;ISHIZUKA MITSUHIRO
分类号 H01L21/68;H01L21/60;(IPC1-7):H01L21/60 主分类号 H01L21/68
代理机构 代理人
主权项
地址