| 摘要 |
Adjacent global column decode lines in a dynamic random access memory (DRAM) are twisted in combination with a complex twist of digit lines such that one global column decoder line provides access to four non-adjacent digit line pairs. The four non-adjacent digit pairs are routed to external pins, allowing data from each of the pairs to be read or written simultaneously. Further, I/O switches which are located between the twisted global column decoder lines are coupled to outside pairs of the twisted digit lines, and the I/O switches which are located outside the twisted global column decoder lines are coupled to inside ones of the complex twisted digit lines.
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