摘要 |
PROBLEM TO BE SOLVED: To perform the seamless slow reproduction of intra-frame compressed VTR by performing the slow reproduction by an operation clock frequency higher than normal for the operation clock frequency of a demodulation circuit, an error correction circuit and an expansion signal processing circuit. SOLUTION: This circuit is provided with a clock supply control means 9 for generating an operation clock provided with a frequency raised for 10% from the operation clock frequency used at the time of a normal operation for the demodulation circuit 1, the error correction circuit 3 and the expansion signal processing circuit 5 from the clock of a normal system frequency at the time of a slow mode, supplying it and performing a slow reproducing operation. At the time of the 1.1-fold speed reproduction of a slow reproducing mode, the rotation speed of the drum of the VTR is increased to 1.1 times, the clock for which a system clock frequency is raised for 10% is supplied to the demodulation circuit 1, the error correction circuit 3 and the expansion signal processing circuit 5 and the operation is performed. Also, at the time of outputting reproducing video data, a data memory 7A and a memory control circuit 7B are operated by the normal system frequency not raised for 10%.
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