| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device with enhances the resistance amount, such as an avalanche resistance amount or an ESD resistance amount. SOLUTION: In the cross-sectional structure of a semiconductor device having a semiconductor substrate 101 of an SOI structure in which an n-type semiconductor layer 103 is formed on the semiconductor substrate 101 via an insulating layer 102, a low-resistance p-type well region 112 is formed in a well region between an n+-type source region 106 and the insulating layer 102. A voltage drop is reduced in this part. Thereby, a parasitic transistor, which is formed of the n-type semiconductor layer 103, a p-type well region 115 and the n+-type source region 106 is made hard to be turned on. In addition, as a formation method for the low-resistance p-type well region 112, e.g. a p-type well region formation mask is used, high-energy ions are implanted, and the low-resistance well region 112 is formed on the bottom face of the p-type well region 105.
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