发明名称 Control device and method for a vertical deflection circuit of a spot scanning a screen, in particular for television or computer monitor
摘要 The method involves using a control circuit with an output amplifier stage (ETS), a main voltage supply, and an auxiliary step-up voltage supply (ALM). A first bidirectional interrupter (T3, D3) is connected to the output stage and controlled so to allow the delivery of stepped-up voltage for a rapid return of spot. The the second bidirectional interrupter (T4, D4) is connected between the principal voltage supply (+Vcc) and the output stage, and controlled so to prevent the delivery of stepped-up voltage during the vertical spot sweep. The output stage (ETS) comprises two transistors (T1, T2) functioning in class D in alternating switching mode for the control of vertical spot sweep. The common node (BSS) of the two transistors is connected to a current-smoothing filter (F) with output to vertical deflector (Vers DV). Each interrupter comprises a transistor (T3, T4) and a diode (D3, D4) in antiparallel connection. The vertical spot sweep comprises two phases; in the first phase the current is positive, ie. in the direction of deflector, and in the second phase the current is in opposite direction, ie. back to the output stage (ETS); the total duration is e.g.19 ms. The rapid spot return is in two following phases. In the first phase the current is negative, and in the second it is positive. The duration is e.g. 0.1 ms, and 0.9 ms, respectively. In the course of the second phase the transistor (T3) is conducting, the transistor (T4) is blocked, and the deflector voltage is constant. A variant of the control circuit comprises an auxiliary, known as flyback, capacitor and an additional transistor interrupter. The second variant of the control circuit comprises a capacitor known as bootstrap for utilising the stored energy. The third variant of the control circuit comprises the flyback capacitor for the control of the first bidirectional interrupter. The fourth variant comprises an output stage in the form of a full bridge circuit, containing four transistors with diodes in antiparallel connection and current-smoothing filter with two inductors for a symmetric connection to the deflector in series with a resistor, and a capacitor.
申请公布号 EP1022855(A1) 申请公布日期 2000.07.26
申请号 EP20000400083 申请日期 2000.01.13
申请人 STMICROELECTRONICS SA 发明人 MAIGE, PHILIPPE;GUEDON, YANNICK
分类号 H03K4/62;H03K4/69;H04N3/16 主分类号 H03K4/62
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