| 摘要 |
PROBLEM TO BE SOLVED: To make an element minute, without affecting the properties of a MISFET, and suppress increase in parasitic resistance of the element accompanying micronization, and also obtain shallow joining of the semiconductor regions to serve as the source and the drain. SOLUTION: The gate electrode 7 is made via a gate insulating film 6 on the element formation region of the main surface of a p-type semiconductor substrate 1, and then semiconductor regions to serve as the source and the drain are made, self-alignedly to the gate electrode, in the element-forming regions of the substrate. Next, an insulating film is made on the element-forming region at the main face of the substrate and on an element isolating region, and the insulting film 11 is left on the element isolating region through selective anisotropic etching, and also a sidewall spacer A, on the sidewall of the gate electrode 7, and a connection hole 11B, on the semiconductor region, are made. Moreover, a conductive film 16 which is lower in sheet resistance than the semiconductor region is made on the main face of the semiconductor substrate including the connection hole, and then the insulating film in other region excluding the inside of the connection hole is removed.
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