发明名称 VERIFYING DEVICE FOR HIERARCHICAL LAYOUT PATTERN
摘要 PROBLEM TO BE SOLVED: To verify the hierarchical layout pattern data with a hierarchical structure kept as it is by verifying the verifying cell data for every cell to acquire the hierarchical error data based on a verifying rule that is associated with every cell by a cell-based verifying rule reading module. SOLUTION: A cell-based verifying rule reading module 7 outputs a verifying rule 8 to every verifying object cell that is designated by verifying decision module 3 against the verifying cell data 6. The module 9 verifies the data 6 based on the rule 8 and acquires the hierarchical error data 10. A hierarchical error data processing module 11 acquires the final error data via the data 10. Thus, a hierarchical layout pattern is verified with a hierarchical structure kept as it is. Thereby the error checking time is shortened.
申请公布号 JP2000194743(A) 申请公布日期 2000.07.14
申请号 JP19980374225 申请日期 1998.12.28
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 KASUYA HIROO
分类号 G06F17/50;H01L21/82;(IPC1-7):G06F17/50 主分类号 G06F17/50
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