发明名称 CIRCUIT AND METHOD FOR GENERATING LOCAL CLOCK SIGNAL, CIRCUIT AND METHOD FOR GENERATING INTERNAL CLOCK SIGNAL AND SEMICONDUCTOR MEMORY DEVICE USING THE SAME
摘要 <p>PROBLEM TO BE SOLVED: To generate plural pieces of local clock signals with no phase difference from an internal clock signal and also to generate an internal clock signal whose phase stably coincides with that of an external clock signal. SOLUTION: A local clock signal generation circuit 110 is provided with plural pieces of phase mixers, and a phase mixer takes signals of two points of a clock line 130 to mix them and makes a phase position in the middle between the phases of the signals of both points. Also, an internal clock signal generation circuit 100 is provided with a feedback 112 and a delay synchronous loop circuit 111. The feedback circuit generates a dummy local clock signal PCLK whose phase is almost equal to that of a clock signal and then generates a feedback clock signal PCLK by delaying almost the same time as delay time of an internal circuit. The delay synchronous loop circuit receives the feedback clock signal and an externally inputted external clock signal and generates an internal clock signal.</p>
申请公布号 JP2000194442(A) 申请公布日期 2000.07.14
申请号 JP19990359515 申请日期 1999.12.17
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 RI TOJUN
分类号 G06F1/10;G06F1/12;G11C7/22;G11C11/407;H03K3/00;(IPC1-7):G06F1/10 主分类号 G06F1/10
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