发明名称 Power controlling apparatus and method
摘要 <p>A clock supply from a clock controller to portions other than a host interface controller is stopped while periodically monitoring a data receiving state from a host. A predetermined maintenance process can be executed each time a power supplying mode is shifted to a low power consumption mode. <IMAGE></p>
申请公布号 EP0929032(A3) 申请公布日期 2000.07.05
申请号 EP19980310792 申请日期 1998.12.30
申请人 CANON KABUSHIKI KAISHA 发明人 AIZAWA, TAKAYUKI
分类号 B41J29/38;G06F1/04;G06F1/26;G06F1/32;G06F3/12;G06K15/00;(IPC1-7):G06F3/12 主分类号 B41J29/38
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