发明名称 DECODING DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a device provided with excellent correction ability even in a deteriorated communication environment where an error rate is about 10-2-10-1 by executing error correction for n error inspection lines by majority logic for which a discrimination value is respectively set when one of the n error inspection lines detects an error. SOLUTION: An arithmetic memory 11 performs the error detection for the n error inspection lines passing through the binary code for each binary code. Then, when at least one of the n error inspection lines detects the error, the error correction for the n error inspection lines is executed by the majority logic for which the discrimination value is respectively set. A CPU 16 adaptively changes a dimension number to a number smaller than n when decoding is started or while executing decoding corresponding to the error rate estimated from an error correction condition in the arithmetic memory 16. Or the error rate is estimated by decoding prescribed marker signals set in the CPU of an encoder and the dimension number is decided.
申请公布号 JP2000172518(A) 申请公布日期 2000.06.23
申请号 JP19980345840 申请日期 1998.12.04
申请人 DDS:KK 发明人 HATA MASATADA;TAKUMI ITSU
分类号 G06F11/10;(IPC1-7):G06F11/10 主分类号 G06F11/10
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