| 摘要 |
A microprocessor 1 has an instruction fetch/decode unit 10a-c, a plurality of execution units, including an arithmetic and load/store unit D1, a multiplier M1, an ALU/shifter unit S1, an arithmetic logic unit ("ALU") L1, a shared multiport register file 20a from which data are read and to which data are written, and a memory 22. Execution unit M1 has circuitry for multiplying two operands, shifting the resulting product and saturating the product if an overflow is detected in two execution phase of an instruction execution pipeline.
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