| 摘要 |
PURPOSE: An inter-processor DPRAM(Dual Port Random Access Memory) communication circuit using arbiter logic is provided to prevent inexact data access caused by address collis ion, in case that a DPRAM is shared between two processors and two processors access an identical address of the DPRAM at the same time. CONSTITUTION: A DPRAM(120) comprises two access terminals. The left one is connected to a master processor(100), and the right one is connected to a slave processor(130). The master processor(100) has a priority for the usage of the DPRAM(120). The master processor(100) and the slave processor(130) have an address bus, a data bus and a control bus to access the DPRAM(120) respectively, and comprise each specific arbiter logic(110,140). The arbiter logic(110,140) proceed a function to prevent the slave processor(130) from accessing the same address, in case that the master processor(100) accesses the DPRAM(120).
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