Programmable sense amplifier delay (PSAD) circuit which is matched to the memory array

摘要

A programmable sense amplifier delay (PSAD) circuit that is matched to the response of the memory array due to temperature and voltage supply Vcc. The circuit includes an inverter, a pull-up transistor, a pull-down transistor of the type of the cells of the memory array and a plurality of capacitors. The inverter responds to a predetermined voltage drop between the voltage level of the voltage source and the voltage on the input line. The pull-up transistor is connected between the voltage source Vcc and the input line and is activatable during a pre-charge phase of the memory array to raise the voltage level of the input line towards the voltage source. The pull-down transistor is connected between the input line and a ground source and is activatable after the pre-charge phase to discharge the voltage level of the input line. The capacitors are selectively connected in parallel to the pull-down transistor and define the speed at which the pull-down transistor discharges the input line. The invention also incorporates the voltage drop inverter.