发明名称 FABRICATION METHOD OF MML SEMICONDUCTOR DEVICE
摘要 PURPOSE: An MML(Merged Memory Logic) semiconductor device is provided to easily form a metal wire by forming a contact hole for several times and to prevent a damage in a silicide layer of a logic area. CONSTITUTION: To fabricate an MML semiconductor device, a capacitor is formed in a DRAM area by using a high temperature process. And, insulating films stacked on the DRAM area and on a logic area are etched for opening the transistor of the logic area. Thus, a silicide layer is formed to prevent the non-resistance of the silicide layer in the logic area from being damaged and reduced caused by the high temperature process of the capacitor in the DRAM area. Then, a first contact hole is formed on a first interpoly oxidation film in the DRAM area and in the logic area using a photosensitive film to form a lower metal wire. Then, a second contact hole is formed in the DRAM area and in the logic area by stacking a second interpoly oxidation film on the lower metal wire. Then, an upper metal wire is connected to the lower metal wire. Thus, damage on an active area is minimized while etching, and a gap filling of the upper/lower metal wire layers is improved.
申请公布号 KR20000030963(A) 申请公布日期 2000.06.05
申请号 KR19980044651 申请日期 1998.10.23
申请人 HYUNDAI ELECTRONICS IND. CO., LTD. 发明人 MUN, WON;CHO, JEONG HO
分类号 H01L21/8226;H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/8226
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