发明名称 System and method for speculative execution of instructions with data prefetch
摘要 <p>A method of operating a microprocessor (12) having an on-chip storage resource. The method first receives a data fetching instruction into an instruction pipeline (38) at a first time. The instruction pipeline has a preliminary stage (40), a plurality of stages (42 through 46) following the preliminary stage, and an execution stage (48) following the plurality of stages. The step of receiving a data fetching instruction at the first time comprises receiving the data fetching instruction in the preliminary stage. The method second performs various steps, including fetching a first data quantity for the data fetching instruction to complete the execution stage of the pipeline, completing the execution stage in connection with the data fetching instruction using the first data quantity, and storing the first data quantity in the on-chip storage resource. The method third receives the data fetching instruction into the preliminary stage at a second time. In response, the method fourth issues a prefetch request for a prefetched data quantity for the data fetching instruction to complete the execution stage of the pipeline. The method fifth completes the execution stage in connection with the data fetching instruction using a predetermined data quantity. The predetermined data quantity is selected from a group of quantities comprising the first data quantity in the on-chip resource and the prefetched data quantity. <IMAGE></p>
申请公布号 EP0855645(A3) 申请公布日期 2000.05.24
申请号 EP19970310679 申请日期 1997.12.30
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 CAI, GEORGE Z. N.;SHIELL, JONATHAN H.
分类号 G06F9/318;G06F9/38;G06F12/08;(IPC1-7):G06F9/38 主分类号 G06F9/318
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