| 摘要 |
PURPOSE: A fabrication method of semiconductor is provided to simplify manufacturing process and increase a width of contact hole by using a spacer having different etching selectivity compared to an interlayer dielectric without additional etching process. CONSTITUTION: On a silicon substrate(30) having a cell and a peripheral regions(A,B), a gate oxide(32), a gate electrode(33), a SiON layer(34) and a protecting oxide(35) are sequentially formed. A nitride layer(36) is deposited on the resultant structure, and a nitride spacer(36A) is formed at both sides of the gate structure of the peripheral region(B). An interlayer dielectric(37) having contact holes formed on the cell and peripheral regions(A,B), respectively is formed on the resultant structure, wherein the interlayer dielectric(37) is made of BPSG having a high etching selectivity compared to the nitride spacer(36A). By using the BPSG(37), the nitride layer(36) exposed at bottom of the contact hole of the cell region is selectively removed.
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