| 摘要 |
PURPOSE: A circuit for determining a position setting control bit in an asynchronous mapping method is provided to determine a position setting control bit, used to match different bit rates, through a difference value between memory input/output addresses, in the process of mapping a DS3E using a VC3. CONSTITUTION: A memory(10) stores input data in a FIFO method and then outputs them. The first subtracter(20a) subtracts a read address value of the memory(10) from its write address value and outputs the first subtraction value to a multiplexer(50). The second subtracter(20b) subtracts the write address value from the read address value and outputs the second subtraction value to a signal inverter(40). A comparator(30) compares the magnitude of the write address and the read address and outputs the first control signal or the second control signal to the multiplexer according to a comparison result. The signal inverter(40) executes complement operation for the second subtraction value and outputs a result to the multiplexer(50). The multiplexer(50) selects the first subtraction value supplied from the first subtracter(20a) or the complement-operated subtraction value supplied from the signal inverter(40) according to the first control signal or the second control signal supplied from the comparator(30) and outputs the selected one to a control bit generation part(60). The control bit generation part(60) generates the first position setting control bit(C1) and the second position setting control bit(C2) according to the subtraction value supplied from the multiplexer(50).
|
